Intel IQ80310Intel IOP310 I/O processor chipset, XScale core

Intel IQ80310

	v. 4.1
	v. 4.0
Architecture:	ARM
Processor group:	XScale® 80200
Markets:	storage, networks
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The Intel® IQ80310 QUICKval kit, based on the Intel IOP310 I/O processor chipset, is a low-cost platform for rapid I/O software development. The kit provides a great tool set for developing storage applications. It includes a complete set of software development core-tools as well as several debug-monitor images. Also included is a full set of related documentation to accelerate development time.

The Intel IOP310 I/O chip-set includes the Intel 80200 microprocessor, featuring a 600 MHz Intel XScale® core, and the Intel 80312 I/O companion chip with an integrated PCI-to-PCI bridge, and 100 MHz SDRAM interface.

The Intel IOP310 I/O chipset evaluation board has been designed to provide a reference for development of efficient I/O subsystems that take full advantage of the Intel IOP310 feature sets (whether it is a 32- or 64-bit PCI subsystem or if it is 33 or 66 MHz). The Intel IQ80310 kit enables a comprehensive platform for rapid design, debug, test and optimization of device drivers.

Logic analyzer and JTAG headers

Five logic analyzer connectors are available on the Intel IQ80310 platform. These 38 position Mictor connectors provide a common Logic Analyzer interface to the SDRAM bus, ROM bus, Interface Bus, and the secondary PCI arbitration signals.

The JTAG header provides a quick and easy connection to key Intel IOP310 JTAG and debug logic signals. Each signal in the JTAG header is paired with its own ground connection to avoid the noise problems associated with long ribbon cables.

Secondary PCI bus expansion connectors

The Intel IQ80310 platform contains secondary PCI bus expansion connectors to give users access to the secondary PCI bus of the Intel IOP310 I/O chipset using standard PCI I/O adapters.

Features:

• 64-bit or 32-bit, 66 MHz or 33 MHz, +3.3V or +5V primary PCI bus interface
• 64-bit or 32-bit, 66 MHz or 33 MHz, +3.3V secondary PCI bus connected to the primary PCI interface with a PCI-to-PCI bridge
• 2 PCI expansion slots available (secondary PCI bus)
• 2 Serial console ports based on 16C550 UART
• Ethernet debug ports based on the 82559 device
• Flash ROM, 8 Mbytes
• JTAG debug header and logic analyze connectors for bus and signal probing
• 168-pin, 3.3V DIMM socket supporting 32 to 512 Mbytes of Synchronous DRAM organized x72 to support Error Correction Code (ECC) and clocked at 100 MHz (Intel® IQ80310 is shipped with 32 Mbytes of SDRAM)
• Two user-programmable 7-segment displays
• 4 Indicator LEDs: processor has passed self-test, 3.3V is supplied to the platform, and 66 MHz is enable for the primary and the secondary PCI slots
• General purpose I/O header
• Battery backup circuit for SDRAM
• System hardware monitor device for temperature and on-board voltages
• DMA channels on both PCI buses
• FC Serial Bus
• Electronic manuals and documentation

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